Taxonomy of the MZ104 Contest Kit
As of this date the Hack Embedded Linux for Fun and Prizes contest kits have been distributed and the winners are working on their projects. The MZ104 manual may be found at http://www.tri-m.com/products/tri-m_engineering/manual/mz104.pdf. The prize kits ended up including much more than was described previously:
BlueCat Linux Development Kit
Tri-M Systems MZ104 PC/104 Board
On Board ZF Linux Devices' MachZ Chip and Phoenix BIOS in Flash
M-Systems 8MB DiskOnChip
MZ104 Cable Kit for connecting to peripherals
MZ104-Utility Card GPS ready (added!)
32MB SDRAM SODIMM Module
Trident 16-bit ISA SVGA Card (added!)
SMC 16-bit ISA Ethernet Card (added!)
ISA104-IO 3 slot 16-bit ISA bus passive backplane with PC/104 connector (added!)
50-Watt 5-Volt Power Supply (added!)
Programming Embedded Systems in C and C++ by Michael Barr, O'Reilly, 1999.
Figure 1. ISA Passive Backplane and MZ104
The backbone of the contest kit is the three slot 16-bit ISA Passive Backplane (see Figure 1). The backplane provides a convenient way to connect the MZ104 to the set of ISA cards supplied for the contest.
The MZ104 edge connector (top and sides) are used for IDE, COM1/2, floppy drive, parallel port and utility board (keyboard, mouse, USB).
Figure 2. The Contest Kit
The contest kit you see in Figure 2 includes the ISA Ethernet and video cards supplied with the kit. It is designed to come up and running out of the box. The on-board 4MB Flash chip contains the PhoenixBIOS and a resident Flash disk (a solid-state floppy drive). You can also connect a floppy disk drive to the cable and boot from the floppy, or you can put a hard disk or CD on the IDE Bus. The video board starts you out with SVGA graphics, and the Ethernet board allows 10/100Mbps communication with the host development system.
The cable kit shown in Figure 3 shows the set of cables supplied--cables for dual serial port, parallel port, dual floppy drive, dual IDE drive and the Mini I/O board. The Mini I/O board contains connectors for the keyboard, mouse, USB, speakers and IrDA. All of these features (and more) come directly out of the MachZ chip. The MachZ also supports a PCI bus, but that bus is unused (no connect) on the MZ104 board. Other MachZ PC/104 boards from Tri-M either bring the PCI bus off-board or use the PCI Bus for high-speed on-board Ethernet.
Figure 3. The Cable Kit
In Figure 4 the Mini I/O board shows the termination of the utility cable. A detailed description of the cables and connections may be found on the Tri-M web site. The Mini I/O board, recommended for most designs, is shown here with the keyboard and mouse cables connected. The flat ribbon cable connects to the MZ104. The battery is used to power the real-time clock and maintain the BIOS setup settings (hey, it's just like your home PC). There is a speaker connector (hidden by the cable) and, on the right, a reset switch. The utility card (shown in Figures 5a-c) has a mini-speaker (looks like a button) and also a speaker connection.
The MZ104 Utility Card GPS Ready
The MZ104 Utility Card GPS Ready (see Figures 5a-c), supplied with the contest kit, brings the keyboard, mouse, serial port and printer up from the MZ104 board. The floppy and HDU cables still come out of the MZ104. The single and double rows of pins accept one of the two industry standard GPS modules, which sandwiches between the cards. The GPS Module is not supplied with the contest kit but is available through Tri-M.
Figure 5a. MZ-Utility with Cables
Figure 5b. MZ-Utility
Figure 5c. GPS Module
The MZ104 board can act as a low-cost, low-power embedded personal computer. You can connect to any standard available CD-ROM drive, hard drive, floppy drive, keyboard, mouse, etc., and you can run standard operating systems. The MachZ is best described as a PC compatible 32-bit x86 system on a chip. That means that all of the stuff that you'd expect to find in a PC is either built-in (ISA bus, PCI bus, IDE controller, Super I/O, printer, etc.) or connects using industry standard interfaces (Ethernet, video, SDRAM). If you have a standard PC Linux, Windows, DOS, VxWorks or QNX system--that system will run on the MachZ.
The MZ104 is an expandable embedded PC. You can pull the DiskOnChip out of the socket and run with the 4MB Flash chip and SDRAM. The Flash chip can contain the BIOS and a resident Flash disk (which can be a bootable floppy image). The Flash chip can also contain a flat image of a Linux kernel or a VxWorks image. You get a free runtime license for the Phoenix BIOS and for VxWorks with each MachZ chip.
You can expand your MZ104 by using a DiskOnChip as large as 288MB with an external hard disk or MicroDrive and a CDR or CDRW drive. You can easily add a GPS receiver with the contest-included MZ104-Utility Card GPS Ready. If you stick with the PC/104 standard, you have access to huge numbers of PC/104 cards and product containers. The new Tri-M MachZ PC/104 cards will also have the on-board Ethernet and external PCI bus access.
Figure 7. MZ104 Board
Bootstrap Register and Chip Setup: The MZ104 contains the MachZ CPU running at 133MHz. On powerup the MachZ sets the ISA address bus to a high impedance state with internal weak pull-ups and pull-downs. The hardware designer may put 2.2K pull-ups or pull-downs in the circuit to override these internal weak pull-ups and pull-downs. The MachZ samples the ISA address bus once on reset and saves the bits in an internal 24-bit register called the bootstrap register.
Two of the bits are the CPU clock multiplier. You may use on-board jumpers to set the clock to 33MHz x 1, 2, 3 or 4. The lower frequencies reduce power consumption. In addition, the APM (Advanced Power Management) built into the BIOS allows you to suspend the CPU until a wake-up event occurs.
Static RAM Interface: The MachZ has four built-in memory chip select signals providing interface to SRAM or Flash memory with no external glue logic. You could put four 16MB memory devices on the SRAM interface. In the contest MZ104 boards, we use memory chip select 0 to address a 4MB AMD Flash chip. This chip contains the BIOS and may also contain a resident Flash disk or large bootable flat images of Linux or VxWorks. These images are available on the ZF Linux Devices web site. The Flash chip is soldered down on the MZ104 board; it is under the DiskOnChip so it does not show in the photograph.
Dynamic RAM Interface: The MachZ is capable of supporting up to four 64MB of SDRAM. Each bank can be 16- or 32-bits wide. Tri-M offers 8, 16, 32 or 64MB SODIMMs (small outline dual in-line memory module) for the SODIMM socket on the MZ104 Board, allowing you to adapt your design. Pricing is available from Tri-M.
DiskOnChip: The M-Systems DiskOnChip is available in 8-288MB. The DiskOnChip can be used as a boot device to boot Linux, and it can be used for the filesystem.
Serial EEPROM Socket: The MZ104 supports the AT17LVXXX-10PX family of Atmel Serial EEPROM devices via an on-board 8-pin socket. These chips sell for $4.00 to $13.00 US in larger quantities. On powerup you can have the MachZ fetch special programs from the SEEPROM to assist in the failsafe recovery of a downed system.
When the MachZ powers up, it samples the ISA bus. Based on ISA23 it will either attempt to boot a BIOS using memcs0 (memory window 0) or it will boot using the on-chip ZF Failsafe Boot ROM (BUR). The BUR, designed by Andrus Aaslaid, provides:
The ZFiX console using COM1.
A command set allowing small test programs to be loaded into the MachZ through the serial port (y-modem) from a host system. This means that, with a power supply and a clock input, you can download and execute programs right into the MachZ. A set of procedure calls to do primitive functions; and the ability to download a set of defined structures comprising programs, data and commands through the 1.5Mbps Z-tag port. The Z-tag port electrically looks like a 2-bit SEEPROM interface.
The MachZ chip comes bundled with a fully licensed and integrated PhoenixBIOS featuring:
ISA and PCI bus configuration,
system resource management,
full boot capabilities,
legacy interrupt services,
Advanced Power Management 1.2 Functions.
In addition to the standard features documented in the PhoenixBIOS user's manual, the MachZ BIOS includes these extended features important for embedded applications:
ZFlash legacy ISA extension processor--allows user extension ROMs to be placed in the same Flash device as BIOS,
ZFlash OS Loader,
universal serial bus host controller and legacy configuration settings,
Watchdog timer function,
remote management from PC host,
resident Flash disk (floppy B in Flash).
The memory paging system built into the MachZ chip is in some ways similar to the old LIM (Lotus, Intel and Microsoft) memory. A window in low memory uses hardware or is simulated in a 32-bit OS using x86 virtual 86 mode. The programmer can access a very large block of external memory by looking through a window in low memory. The viewport can be moved so as to allow any piece of the external memory to appear in the window. The MachZ has four memory chip select signals that, under hardware, provide windows (as small as 8K) to scroll through external SRAM or Flash memory as big as 16MB (the full ISA 24-bit address space). Thus the MachZ supports up to four banks of SRAM/Flash. In the MZ104, there is one 4MB Flash chip that uses memory chip select 0.
1) Put the image(s) into the 4MB AMD Flash chip supplied with the contest kit. A utility, AMDFLASH.EXE, will do that for you. 2) Write small loaders in the style of an option ROM, using examples provided by ZF Linux Devices. Each loader will simply copy the image it knows about into DRAM and start it off. 3) In BIOS setup, specify where your small loader is in the Flash. If you specify no loader then the int 19h occurs and a normal boot occurs. If you specify a loader, transfer is made to that loader. Note that the image loaded will likely construct its own filesystem in the DRAM or use the DiskOnChip for a filesystem.
SDRAM chips have sophisticated features that make them considerably faster then previous types of RAM. First, SDRAM chips are fast enough to be synchronized with the CPU's clock, which eliminates the need for wait states. Second, the SDRAM chip is divided into two cell blocks, and data is interleaved between the two so that while a bit in one block is being accessed, the bit in the other is being prepared for access. This allows SDRAM to burst the second and subsequent, contiguous characters at a rate of 10ns, compared to 60ns for the first character. The MachZ SDRAM controller is capable of addressing SDRAM chips with densities from 16Mb to 128Mb (2MB to 16MB).
Tri-M Engineering chose to use a modular memory approach, using SODIMM. A SODIMM is a small circuit board with 64-bit-wide data path; these modules are prevalent on the PowerPC platform. They have also been widely deployed in high-performance notebooks and x86 embedded single-board computers such as the MZ104. The use of SDRAM chips in TSOP (Thin Small Outline Package) packaging permits a very large amount of RAM to fit comfortably in a very small space, making it ideal for small physical environments.
Figure 10 shows a SODIMM module sitting in the SODIMM socket. As you can see from the picture every other chip pad has no memory chip in it, due to the way this board was laid out. Tri-M now has three different license-free SODIMM board layout designs that are available from their web site.
The challenge for the R&D staff at Tri-M, after deciding to use the SODIMM 144-pin memory cards, was that most SODIMM manufacturers designed for a 64-bit-wide data path.
The MachZ was designed to use either 16- or 32-bit-wide SDRAM. Tri-M's engineering staff tested the first MZ104 board using the 64MB module taken from their president's HP notebook computer (Doug: ``I keep asking them to give it back!''). The notebook SODIMM worked fine but only used half of the 64MB.
The obvious solution is to not populate the upper 32 bits of memory. Great theory, but not all SODIMM memory cards can be depopulated and still work with the MachZ. When SDRAM chips of 16-bit width are used, some manufacturers wire one half of the memory into the first 32 bits and the other half of the memory into the second 32-bits. This makes for efficient PCB layout, but when a chip is depopulated, it also depopulates the lower 32 bits (the lower 32 bits are the ones the MachZ require). It turned out that the memory from the president's notebook was the right type to depopulate, and so the depopulation theory was proved. The memory pirated from the presidential notebook was made by ATP Electronics, Inc. and used four 128Mb chips, providing 64MB of memory for the MachZ. The same PCB from ATP could be configured using 1, 2 or 4MB chips. Thus, with one PCB layout 8, 16, 32, and 64MB can be assembled.
It turns out the maximum memory size for a SODIMM that the MachZ can support is 64MB, either with four 128Mb chips or eight 64Mb chips. However, if more memory is required the MachZ could support two SODIMM connectors.
For those who wish to manufacture their own SDRAM SODIMM memory modules, Tri-M Engineering will supply the schematics and gerber files upon request (at no charge).
The 4MB AMD Flash chip on the contest boards comes preloaded with the PhoenixBIOS. Using the BIOS setup you can create a 1.44MB floppy disk drive in Flash. You may also place a large flat Linux image in Flash and use the BIOS to help you load that into the SDRAM.
For information on the AMD Flash chip see the AM29F032B-90EC on the AMD web site (http://www.amd.com/products/nvd/techdocs/techdocs.html). The chip is divided into 64K sectors. In order to write to the chip, you (or the program dealing with the chip) have to erase the entire sector. When a sector is erased, the data goes to all 1s (each byte is 0xFF). There are commands that allow you to erase a sector or the entire chip. Be careful, if you erase the entire chip you have to reflash the BIOS!
Commands to erase or write to the chip involve a sequence of bytes output to specific addresses. It's kind of like a combination lock, so it is unlikely that you would accidentally erase or overwrite the chip.
A Flash chip is optimal for rewritable nonvolatile storage. Because the sectors are big, the Flash chip is best for static data such as BIOS images or code images. However, using appropriate software (such as the resident Flash disk software built into the MachZ BIOS) the Flash can be used as a compromise filesystem.
DiskOnChip is a brand name of M-Systems. Because the DiskOnChip is so popular, software drivers exist for virtually all operating systems. The DiskOnChip has a great deal of logic inside for optimal use of the Flash for a disk device. In addition, the sectors are small (512 bytes rather than 64K) so that erase is efficient.
Figure 11. DiskOnChip
The M-Systems DiskOnChip is available in 8-288MB, using the same socket and same electrical interface. The DiskOnChip provides a full hard disk emulation and can be used as the boot device. It is a cost-effective solution using low-power consumption. If you are designing your own hardware, you may consider a full set of solutions (see Table 1).
If you need a disk, why not use a hard disk or a MicroDrive? The MachZ has the IDE hardware on chip, and there is an IDE cable provided with the contest kit. If you need 4GB, you want to use a hard disk. If you need 8-40MB, a DiskOnChip is the obvious solution. See Table 2 for other things to consider.
Raymond G. Brinks (firstname.lastname@example.org) is chief technical officer and vice president of engineering at ZF Linux Devices. Brinks joined ZF in November 1997. Doug Stead (email@example.com) founded Tri-M Systems, Inc. and Tri-M Engineering, distributors and manufacturers of x86 embedded hardware. Doug is also a founding director of the American Anti-Child Pornography Organization helping protect children from digital criminals (http://www.antichildporn.org/).