Coreboot at Your Service!

Don't let your PC's closed-source BIOS stop you from doing what you want with your hardware.

Lines 1 and 2 define the board and board manufacturer that makes the board we're targeting. Lines 3–5 set the logging level. Higher values give you more information, and logging information comes out on a serial (RS-232) port.

Line 6 specifies the size of the Flash (ROM) memory chip on your board.

Line 7 indicates that coreboot may access CMOS memory for getting any parameters—in particular, the boot sequence.

Line 8 specifies that the boot image (payload) is located in ROM. In some situations you will want to load the payload via a serial port. For those cases, use this:


Line 9 sets the strategy used to start coreboot. For example, if the checksum from CMOS-memory is not valid, instead of loading the “normal” part, coreboot must start the backup part—that is, “fallback”.

Line 10 specifies the compression method (NRV2B). Because Flash chip sizes are somewhat limited, you can (or may have to) use a compressed payload. Instead of NRV2B, you can use LZMA—a more-advanced method:


Line 11 specifies the size of the backup (fallback) part: 128kB, half the size of the Flash chip.

Line 12 indicates where exactly in RAM the compressed coreboot will be placed upon power-up.

Lines 13–18 and 19–24 are almost identical except for name and ID. Here you define the “normal” and “fallback” parts. If coreboot can't start the “normal” part for some reason, it will start the reserved, “fallback” part instead.

The last line specifies how the build tool must combine both parts into a single file. See Resources for more information on all of these options.

That's all for the configuration; now compile coreboot for the EPIA-M:

$ cd coreboot-v2/
$ ./buildtarget via/epia-m
$ cd via/epia-m/epia-m/
$ make

The coreboot image is ready. The next step is writing it into the Flash chip. To do this, you need a special tool, flashrom, which comes with the coreboot sources:

$ cd coreboot-v2/util/flashrom/
$ make

Before proceeding, take note, if problems occur when writing to the Flash or if you've configured coreboot improperly (such as forgetting to include a payload), you can brick your hardware. Therefore, it's highly recommended that you have a way to restore your BIOS, such as by using BIOS Savior from IOSS (Figure 1).

Figure 1. BIOS Savior is a must-have tool.

To write to the Flash chip, execute the following command:

# ./flashrom -w ~/coreboot-v2/targets/via/epia-m/epia-m/coreboot.rom

Then, verify that Flash has been written correctly:

# ./flashrom -v ~/coreboot-v2/targets/via/epia-m/epia-m/coreboot.rom

In order to see boot messages with OpenSUSE 11.0, I first need to modify my GRUB configuration to set the serial line to a speed of 115200 (Listing 5). Now, when I start my EPIA-M, I will be able to see coreboot's output in minicom.

You now should be ready to reboot, so shut down the EPIA-M, connect a null-modem serial cable, and run minicom:

# minicom -o -8 ttyUSB

Next, restart the EPIA-M, and minicom should show you a GRUB-like boot menu (Figure 2). As the system boots, the operating systems' boot messages also appear in minicom (Figure 3).

Figure 2. You can control the booting process via minicom.

Figure 3. The operating system writes to serial port.



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Some clarifications

Cristi Măgherușan's picture

Hi there,

@Anonymous: there's a list of supported hardware. Basically if your motherboard's components are already supported, the motherboard shouldn't be very hard to get working, but if this isn't the case, the needed work can be quite consistent.

@Boris: The v3 was dropped in favor of v2 and is now unmaintained (except for Via Epia targets). Many of v3's features were backported to v2, which still has much better hardware support than v3.

The coreboot wiki page is a good reading, and the people from the IRC channel or from the mailinglist are a great source of help also.

Thank you for the

bam's picture

Thank you for the article.
Could you try to boot the latest trunk version? I've tried to boot trunk svn revision 4974 but can't get even serial output from my epia-m.

Does it work on my box?

Anonymous's picture

How the heck can I find out whether coreboot will work on my machine? I'm using Linux, of course.

superiotool don't recognize my super i/o