Lock-Free Multi-Producer Multi-Consumer Queue on Ring Buffer

Nowadays, high-performance server software (for example, the HTTP accelerator) in most cases runs on multicore machines. Modern hardware could provide 32, 64 or more CPU cores. In such highly concurrent environments, lock contention sometimes hurts overall system performance more than data copying, context switches and so on. Thus, moving the hottest data structures from a locked to a lock-free design can improve software performance in multicore environments significantly.

One of the hottest data structures in traditional server software is the work queue, which could have hundreds of thousands of push and pop operations per second from tens of producers and/or consumers.

The work queue is a FIFO data structure that has only two operations: push() and pop(). It usually limits its size such that pop() waits if there are no elements in the queue, and push() waits if the queue contains the maximum allowed number of elements. It is important that many threads can execute pop() and push() operations simultaneously on different CPU cores.

One of the possible work queue implementations is a ring buffer for storing pointers to the queued elements. It has good performance especially in comparison with the common non-intrusive linked list (which stores copies of values passed by the user, such as std::list). The significant thing about the ring buffer implementation is that it natively limits its size—you can only move the current position in a round-robin fashion. On the other hand, linked lists require maintaining an additional field for total queue length. With linked lists, push and pop operations have to modify the queue length in addition to element links updating, so you need to take more care with consistency in the queue for a lock-free implementation.

Basically, different CPU families provide different guarantees for ordering memory operations, and this is critical for lock-free algorithms. In this article, I concentrate on x86, as it is the most widespread architecture rather than write generic (but slower) code.

Naive Synchronized Queue

First, let's define the interface for our queue (I use C++11 in this article):


template<class T, long Q_SIZE>
class NaiveQueue {
public:
    NaiveQueue();
    void push(T *x);
    T *pop();
};

The queue will store T* pointers and has a maximum size of Q_SIZE.

Let's see how the queue would look in a naive locked implementation. To develop the queue, we need an array in which we place our ring buffer. We can define this as:


T *ptr_array_[Q_SIZE];

Two members of the class, head_ and tail_, will point to the head (the next position to push an element) and tail (the next item to pop) of the queue and should be initialized to zero in the class construction. We can simplify our operations on the ring buffer by defining the counters as an unsigned long. An unsigned long (which is 64-bit in length) is large enough to handle more than millions of operations per second for thousands of years. So tail_ and head_ will be defined as:


unsigned long head_;
unsigned long tail_;

This way, we can access the elements (the same for head_ and tail_) just by the following:


ptr_array_[tail_++ & Q_MASK]

where Q_MASK is defined as:


static const unsigned long Q_MASK = Q_SIZE - 1;

To get the current position in the array, we can calculate a remainder of integer division of tail_ by Q_SIZE, but rather we define Q_SIZE as a power of 2 (32768 in our case), so we can use bitwise AND between Q_MASK and tail_, which is bit faster.

______________________

Alexander Krizhanovsky is the software architect and founder of NatSys-Lab. Before NatSys-Lab, he worked as a Senior Software Developer at IBM, Yandex and Parallels. He specializes in high-performance solutions for UNIX environments.

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what's the solution for

Anonymous's picture

what's the solution for compile error?

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compiling

John Ellson's picture

Doesn't compile for me using: g++ (GCC) 4.8.1 20130603 (Red Hat 4.8.1-1)

The error messages fill a screen, but the first few lines are:

lockfree_rb_q.cc: In member function ‘void NaiveQueue::push(T*)’:
lockfree_rb_q.cc:72:31: error: capture of non-variable ‘NaiveQueue::head_’
cond_overflow_.wait(lock, [&head_, &tail_]() {
^
lockfree_rb_q.cc:98:17: note: ‘long unsigned int NaiveQueue::head_’ declared here
unsigned long head_, tail_;
^
lockfree_rb_q.cc:72:39: error: capture of non-variable ‘NaiveQueue::tail_’
cond_overflow_.wait(lock, [&head_, &tail_]() {
^
lockfree_rb_q.cc:98:24: note: ‘long unsigned int NaiveQueue::tail_’ declared here
unsigned long head_, tail_;
^

Suggestions?

Fixed

A.Krizhanovsky's picture

John, thank you for the bug report!

I've fixed compilation errors for GCC 4.8. Please, fetch the new version of the code from GitHub.

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Temporal variable

Anonymous's picture

Aside: I believe I am the registered user rhkramer (at least, I used to be) but this posting thingie wouldn't let me use that name--I think if someone at LJ looks it up, they'll see that my email and the email of registered user rhkramer are the same.

Do you really mean temporal variable or do you just mean a temporary variable.

I had never heard of a temporal variable before I read this article, then I did some googling to find it.

In looking at a page of 10 google hits, I then investigated 3 or 4 of those. At least one of them definitely simply meant temporary variable, and, at the time I looked at the article, it used the phrase temporary variable. I'm guessing that at the time google indexed the article it might have said temporal variable--but there were no remaining instances of temporal in the article. OTOH, maybe google decided that I meant temporary and used temporary instead of temporal in the query.

One hit on the page of hits did give me some hints as to what might be meant by a temporal variable:

'
On the semantics of (Bi)temporal variable databases - Springer
link.springer.com/chapter/10.1007%2F3-540-57818-8_53
Numerous proposals for extending the relational data model to incorporate the
temporal dimension of data have appeared during the past several years.
'

I guess my point is (especially as an old guy trying to keep up with some of this stuff), is that it sure would help if terminology didn't change unnecessarily. If the variable in this article truly is something more or different than a temporary variable, fine (but then please provide a definition or a pointer to a definition), but, if it is no different, then just please use "temporary variable".

Misprint

A.Krizhanovsky's picture

Yes, sure, I did mean temporary variable, not temporal variable. Thank you for the indication of the error.

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Inaccuracy

alastair's picture

The article claims that the "mfence" in the sequence

A
mfence
B

will cause the instruction "A" to execute before the instruction "B".

This is untrue (and is explicitly contradicted by the Intel manuals, which state categorically that “mfence does not serialize the instruction stream”; i.e. the instructions can still execute out of order).

The mfence will cause memory accesses before the fence to complete before memory accesses after the fence (more accurately, it causes memory accesses before the fence to become globally visible — i.e. their effects are apparent to other cores in the system — before those after the fence).

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Simplification

A.Krizhanovsky's picture

This was just a simplification for gentle introduction to memory ordering and when and why barriers are used. Unfortunately, the article has limited size, so there is no opportunity to carefully and fully describe this and some other interesting points.

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Re: Inaccuracy

digitas's picture


A
mfence
B

If effects of the instruction A and B are to be visible outside the processor core they must somehow access the memory (or to be precise maybe the cache). The article explains inter core or inter processors relations, so IMHO the explanation in the article is a little simplification but it is not inaccurate.

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