Crusoe: Transmeta's Trump Card
We all knew Linux was ideal for embedded and mobile systems, and many of us predicted more success for Linux in embedded systems than on the desktop. Many of us also suspected (since Linus's remark about a chip with software, and after looking at Transmeta's patent filings) that we'd soon have a chip that translated instructions on the fly into the native language of the chip. Today, Transmeta confirmed suspicions and delivered more than most of us had expected.
At 9 a.m. today, Transmeta finally presented its new Crusoe family of processors, ending months of speculation about what exactly Transmeta (that company that hired Linus) has been doing. Two chips are currently known to exist. Information about the chips has been scarce, which is ironic during the information age. Here's a quick run-down of the new Crusoe processor.
Transmeta currently has two chips, the TM3120 and the TM5400. Both chips are being produced by IBM, and many have already been shipped to notebook manufacturers throughout the world.
The TM3120 model is targeted at mobile Internet devices such as web-pads and PDAs and, hopefully, cell phones. It runs from 333-400MHz, has 96KB of L1 cache and no L2 cache. It supports SDRAM memory of 66 to 133MHz. It consumes 1 Watt of power, scaling down to 20 milliwatts during sleep-mode. It is produced with the .22 micron process. It is targeted at mobile Internet devices. It will run x86 software and features the new Mobile Linux, developed by Torvalds (and soon to be released to the community), which is a version of Linux totally contained in ROM. It apparently has its own IDE and GUI (this is not verified), and is used for machines without hard-drives. It uses very little memory and requires little power. Hence it is ideal for mobile computing.
The TM5400 model is targeted at ultra-light mobile PCs. It runs from 500-700MHz, has 128KB of L1 cache and 256K of L2 cache. It supports DDR-SDRAM of 100 to 166MHz, and memory upgrades of SDRAM in the 66 to 133MHz range. This chip consumes typically less than 1 watt of power, with as little as 8 milliwatts when idle (not asleep, just idle). This chip features LongRun technology, whereby the chip's software adjusts its clock frequency and voltage to correspond exactly to the demands of the application. The TM5400 supports x86 software, which means that all versions of Linux and the Windows line will work, and I would expect this also includes BeOS (what did this have to do with Be's decision to move into Internet appliances?) and the free Unices. Transmeta claims the new chip can play DVD movies with less than 2 watts of power.
The fundamental idea behind the Crusoe family of processors is software. Crusoe is, to my knowledge, the only processor with its own special software (please contact me if you know of another). The Crusoe processors have a native language, which is a 128-bit VLIW (very large instruction word) instruction set. This methodology is a bit like RISC times 4; that is, you construct an instruction molecule out of atoms, and each atom would be roughly equivalent to a RISC instruction. The chip then uses no speculative execution, branch prediction, or data flow analysis techniques (which severely waste energy and can create pipeline stalls), but instead carries all information about the instructions and scheduling with the molecule that goes to the processor. VLIW is a neat idea, but it's not the truly exciting thing about Crusoe.
Crusoe chip software employs Code Morphing. This is what we expected since last summer, but it's true and it's really here. Crusoe software morphs x86 code into its own native language on the fly. Not only that, but it caches the translated instructions (no need to translate data for a data cache), so that it hasn't got to retranslate them. What is the advantage of this? Not only can you write software that would enable a chip to be effectively any chip, but also there's one monstrous advantage for portable computing: the reduction of transistors.
The popularity of RISC chips in embedded systems is due largely to the fact that RISC severely economizes on transistors. This means very low power consumption and very low heat. RISC eliminates transistors by eliminating tons of useless instruction present in CISC chips (this is an oversimplification).
Crusoe replaces transistors with “software”. There's no reason to have millions of transistors draining energy if you can replace these transistors with software. Crusoe replaces hardware with software at a level that hasn't been utilized before. Crusoe's software also (as already mentioned) manages the caching of instructions, so typical power-consuming microarchitecture techniques that accelerated chips of old have also been replaced by software!
Software also replaces the stupid BIOS power-on power-off cycles that typical laptops use to conserve power. The arbitrary power-flickers, while they conserve energy, have given headaches to laptop users, cutting off system resources in the middle of critical tasks. In addition, the old technique never really conserved power very effectively. It's a lot like running a car engine either completely at full power, or off. Why not just run your engine to get you the speed you need, and not waste resources?
Crusoe's software knows “exactly” how much energy an application needs, and not only alters the clock frequency of the chip to correspond, but also alters the voltage requirements to correspond. It does this in a way that consistently maximizes performance for an application without wasting any energy (clock frequency has a linear effect and voltage has a squared effect on power consumption). For example, do you remember when PCs had a “turbo” button? That button regulated voltage to the chip to slow it down so that older programs such as games would run at a usable speed. Crusoe's software is like a dial that goes up and down automatically for optimal voltage... and it changes the chip's clock frequency, like unplugging your Athlon and inserting a P75 to save energy, then boosting back up, only again it is a dial. Can you imagine having two dials to regulate clock frequency and voltage? Fortunately, Crusoe chips do this for you so you don't have to. Remember, when you're dealing with clock speeds and voltage, you've got two dials, so your power savings will be multiplied. A mere 10 percent reduction to power actually becomes a 27% reduction. Probably you get the picture by now of how this works.
Here is a summary for those who skipped the preceding paragraphs:
Transmeta has developed a new family of processors named Crusoe.
Currently two Crusoe chips are available, the TM3120 and TM5400.
These chips are for mobile Internet appliances.
The TM3120 is targeted at smaller machines such as PDAs.
The TM5400 is targeted at laptop and notebook computers.
Crusoe chips are VLIW (very large instruction word) based.
Crusoe chips have their own software which exists on the chip.
Crusoe software translates instructions on the fly to its native language.
Crusoe currently runs all x86 software including Linux and Windows.
Crusoe software automatically regulates clock frequency and voltage to deliver exactly as much power as an application requires (no idle CPU cycles, no wasted batteries).
Crusoe's VLIW methodology is based on instruction molecules which are made up of instruction atoms.
Crusoe software generates its own 'microarchitecture' techniques which are included with the instruction molecules.
Crusoe caches translated code.
Crusoe runs at very low temperatures and does not require a fan.
Crusoe software supports Northbridge integrated support circuitry without an additional chip or extra power consumption.
Crusoe consumes 1 to 2 watts under heavy loads, and often subsists on 8 to 20 milliwatts when idle, altering power consumption on the fly.
Transmeta (Linus Torvalds) has developed a small-footprint, low power-consumption version of Linux known as Mobile Linux, available as a ROM chip, and supposedly to be released to the community soon.
I sincerely hope that this brief preliminary information is of some help in satisfying your curiosity. I had hoped to find technical information on exactly what Crusoe's VLIW instruction set looks like, what the typical syntax would be, in order to appreciate the chips on a more than superficial level. I also have no information on the exact number of transistors, though because of the low power consumption we would have to estimate that it is very small.
Transmeta's website is a good source of information, and is not very technical. I recommend it for a clear, English-language explanation of the chips. www.transmeta.com.
As the information was recently released, it is possible that some statements are inaccurate, as we do not exactly have a copy of the chip to verify everything. I have made a sincere effort to verify as much as possible, but the possibility exists that something could be wrong. This is not an excuse or a disclaimer, just friendly advice to verify details with Transmeta before embarking on any major business plans.
Linux Journal Senior Editor Doc Searls is interviewing Linus and we will have that interview, as well as Doc's account of the proceedings (which I imagine will emphasize market and Internet elements of the Crusoe chip and Linus's involvement), available soon.
Best wishes for fun with this new technology!
|Dynamic DNS—an Object Lesson in Problem Solving||May 21, 2013|
|Using Salt Stack and Vagrant for Drupal Development||May 20, 2013|
|Making Linux and Android Get Along (It's Not as Hard as It Sounds)||May 16, 2013|
|Drupal Is a Framework: Why Everyone Needs to Understand This||May 15, 2013|
|Home, My Backup Data Center||May 13, 2013|
|Non-Linux FOSS: Seashore||May 10, 2013|
- RSS Feeds
- Making Linux and Android Get Along (It's Not as Hard as It Sounds)
- Using Salt Stack and Vagrant for Drupal Development
- Dynamic DNS—an Object Lesson in Problem Solving
- New Products
- Validate an E-Mail Address with PHP, the Right Way
- Drupal Is a Framework: Why Everyone Needs to Understand This
- A Topic for Discussion - Open Source Feature-Richness?
- Download the Free Red Hat White Paper "Using an Open Source Framework to Catch the Bad Guy"
- Tech Tip: Really Simple HTTP Server with Python
- Roll your own dynamic dns
4 hours 12 min ago
- Please correct the URL for Salt Stack's web site
7 hours 24 min ago
- Android is Linux -- why no better inter-operation
9 hours 39 min ago
- Connecting Android device to desktop Linux via USB
10 hours 8 min ago
- Find new cell phone and tablet pc
11 hours 6 min ago
12 hours 34 min ago
- Automatically updating Guest Additions
13 hours 43 min ago
- I like your topic on android
14 hours 30 min ago
- This is the easiest tutorial
21 hours 5 min ago
- Ahh, the Koolaid.
1 day 2 hours ago
Enter to Win an Adafruit Pi Cobbler Breakout Kit for Raspberry Pi
It's Raspberry Pi month at Linux Journal. Each week in May, Adafruit will be giving away a Pi-related prize to a lucky, randomly drawn LJ reader. Winners will be announced weekly.
Fill out the fields below to enter to win this week's prize-- a Pi Cobbler Breakout Kit for Raspberry Pi.
Congratulations to our winners so far:
- 5-8-13, Pi Starter Pack: Jack Davis
- 5-15-13, Pi Model B 512MB RAM: Patrick Dunn
- 5-21-13, Prototyping Pi Plate Kit: Philip Kirby
- Next winner announced on 5-27-13!
Free Webinar: Hadoop
How to Build an Optimal Hadoop Cluster to Store and Maintain Unlimited Amounts of Data Using Microservers
Realizing the promise of Apache® Hadoop® requires the effective deployment of compute, memory, storage and networking to achieve optimal results. With its flexibility and multitude of options, it is easy to over or under provision the server infrastructure, resulting in poor performance and high TCO. Join us for an in depth, technical discussion with industry experts from leading Hadoop and server companies who will provide insights into the key considerations for designing and deploying an optimal Hadoop cluster.
Some of key questions to be discussed are:
- What is the “typical” Hadoop cluster and what should be installed on the different machine types?
- Why should you consider the typical workload patterns when making your hardware decisions?
- Are all microservers created equal for Hadoop deployments?
- How do I plan for expansion if I require more compute, memory, storage or networking?